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| ICX415AQ Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras Description The ICX415AQ is a diagonal 8mm (Type 1/2) interline CCD solid-state image sensor with a square pixel array. Progressive scan allows all pixel's signals to be output independently within approximately 1/50 second. This chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still image without a mechanical shutter. High resolution and high color reproductivity are achieved through the use of R, G, B primary color mosaic filters. Further, high sensitivity and low dark current are achieved through the adoption of HAD (Hole-Accumulation Diode) sensors. This chip is suitable for applications such as FA and surveillance cameras. Features * Progressive scan allows individual readout of the image signals from all pixels. * High vertical resolution still images without a mechanical shutter * Square pixel * Horizontal drive frequency: 29.5MHz * R, G, B primary color mosaic filters on chip * No voltage adjustments (reset gate and substrate bias are not adjusted.) * High resolution, low dark current, high color reproductivity, high sensitivity * Continuous variable-speed shutter * Low smear * Excellent anti-blooming characteristics 22 pin DIP (Cer-DIP) Pin 1 2 V 8 3 Pin 12 H 38 Optical black position (Top View) Device Structure * Interline CCD image sensor * Image size: Diagonal 8mm (Type 1/2) * Number of effective pixels: 782 (H) x 582 (V) approx. 460K pixels * Total number of pixels: 823 (H) x 592 (V) approx. 490K pixels * Chip size: 7.48mm (H) x 6.15mm (V) * Unit cell size: 8.3m (H) x 8.3m (V) * Optical black: Horizontal (H) direction: Front 3 pixels, rear 38 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels * Number of dummy bits: Horizontal 19 Vertical 5 * Substrate material: Silicon Wfine CCD is trademark of Sony corporation. Represents a CCD adopting progressive scan, primary color filter and square pixel. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E02404B35 ICX415AQ Block Diagram and Pin Configuration (Top View) VOUT GND CGG V1 V2 V3 NC NC NC NC NC 11 10 9 8 7 6 5 4 3 2 1 R Vertical register G B G B G B G R G R G R G R G B G B G B G Note) G R G R G R Horizontal register Note) 12 VDD : Photo sensor 13 RG 14 VL 15 SUB 16 H1 17 H2 18 NC 19 NC 20 CSUB 21 SUBCIR 22 NC Pin Description Pin No. Symbol 1 2 3 4 5 6 7 8 9 10 11 NC NC V3 V2 V1 NC GND NC VOUT CGG NC Signal output Output amplifier gate1 GND Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Description Pin No. Symbol 12 13 14 15 16 17 18 19 20 21 22 VDD RG VL SUB H1 H2 NC NC CSUB SUBCIR NC Substrate bias2 Supply voltage for the substrate voltage generation Description Supply voltage Reset gate clock Protective transistor bias Substrate clock Horizontal register transfer clock Horizontal register transfer clock 1 DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance of 1F or more. 2 DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance of 0.1F or more. -2- ICX415AQ Absolute Maximum Ratings Item Substrate clock SUB - GND Supply voltage Clock input voltage VDD, VOUT, CGG, SUBCIR - GND VDD, VOUT, CGG, SUBCIR - SUB V1, V2, V3 - GND V1, V2, V3 - SUB Ratings -0.3 to +55 -0.3 to +18 -55 to +10 -15 to +20 to +10 to +15 to +17 -16 to +16 -10 to +15 -55 to +10 -65 to +0.3 -0.3 to +27.5 -0.3 to +22.5 -0.3 to +17.5 -30 to +80 -10 to +60 -10 to +75 Unit V V V V V V V V V V V V V V C C C 1 Remarks Voltage difference between vertical clock input pins Voltage difference between horizongal clock input pins H1, H2 - V3 H1, H2 - GND H1, H2 - SUB VL - SUB V2, V3 - VL RG - GND V1, H1, H2, GND - VL Storage temperature Performance guarantee temperature Operating temperature 1 +27V (Max.) when clock width < 10s, clock duty factor < 0.1%. +16V (Max.) is guaranteed for power-on and power-off. -3- ICX415AQ Bias Conditions Item Supply voltage Protective transistor bias Substrate clock Reset gate clock Symbol VDD VL SUB RG Min. 14.55 Typ. 15.0 1 2 3 Max. 15.45 Unit V Remarks 1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same voltage as the VL power supply for the V driver should be used. 2 Indications of substrate voltage setting value Set SUBCIR pin to open when applying a DC bias the substrate clock pin. Adjust the substrate voltage because the setting value of the substrate voltage is indicated on the back of image sensor by a special code when applying a DC bias the substrate clock pin. VSUB code - two characters indication Integer portion Decimal portion The integer portion of the code and the actual value correspond to each other as follows. Integer portion of code Value A 5 C 6 d 7 E 8 f 9 G 10 h 11 J 12 [Example] "A5" VSUB = 5.5V 3 Do not apply a DC bias to the reset gate clock pins, because a DC bias is generated within the CCD. DC Characteristics Item Supply current Symbol IDD Min. 4.0 Typ. 7.0 Max. 9.0 Unit mA Remarks -4- ICX415AQ Clock Voltage Conditions Item Readout clock voltage VVT VVH02 VVH1, VVH2, VVH3 VVL1, VVL2, VVL3 VVL1, VVL2, VVL3 Vertical transfer clock voltage V1, V2, V3 | VVL1 - VVL3 | VVHH VVHL VVLH VVLL VH Horizontal transfer clock voltage VHL VCR VRG Reset gate clock voltage VRGLH - VRGLL VRGL - VRGLm Substrate clock voltage VSUB 21.5 22.5 4.75 -0.05 0.8 4.5 5.0 0 2.5 5.0 5.5 0.8 0.5 23.5 Symbol Min. 14.55 -0.05 -0.2 -7.8 -8.0 6.8 Typ. 15.0 0 0 -7.5 -7.5 7.5 Max. Unit 15.45 0.05 0.05 -7.2 -7.0 8.05 0.1 0.5 0.5 0.5 0.5 5.25 0.05 V V V V V V V V V V V V V V V V V V Waveform Diagram 1 2 2 2 2 2 2 2 2 2 2 3 3 3 4 4 4 5 Low-level coupling Low-level coupling Cross-point voltage High-level coupling High-level coupling Low-level coupling Low-level coupling VVL = (VVL1 + VVL3)/2 (During 29.5MHz) VVL = (VVL1 + VVL3)/2 (During 14.75MHz) VVH = VVH02 Remarks -5- ICX415AQ Clock Equivalent Circuit Constants Item Symbol CV1 Capacitance between vertical transfer clock and GND CV2 CV3 CV12 Capacitance between vertical transfer clocks CV23 CV31 Capacitance between horizontal transfer clock and GND CH1, CH2 Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor CHH CRG CSUB R1, R2 R3 RGND RH1, RH2 RRG Min. Typ. 3900 3300 3300 2200 2200 1800 47 30 6 390 27 22 100 16 39 Max. Unit pF pF pF pF pF pF pF pF pF pF Remarks V1 R1 CV12 CV1 RGND CV31 CV3 CV23 CV2 R2 V2 RH1 H1 CHH CH1 CH2 RH2 H2 R3 V3 Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit RRG CRG Reset gate clock equivalent circuit -6- ICX415AQ Drive Clock Waveform Conditions (1) Readout clock waveform VT 100% 90% M VVT 10% 0% tr twh tf 0V M 2 Note) Readout clock is used by composing vertical transfer clocks V2 and V3. (2) Vertical transfer clock waveform V1 VVHL VVH1 VVHH VVH VVLH VVL01 VVL1 VVLL VVL V2 VVH02 VVHH VVHL VVH2 VVH VVLH VVL2 VVLL VVL V3 VVHL VVH3 VVHH VVH VVL03 VVLL VVLH VVL VVH = VVH02 VVL = (VVL01 + VVL03)/2 VVL3 = VVL03 -7- VV1 = VVH1 - VVL01 VV2 = VVH02 - VVL2 VV3 = VVH3 - VVL03 ICX415AQ (3) Horizontal transfer clock waveform H1, H2 H2 90% VCR VH twl VH 2 10% H1 two VHL tr twh tf Cross-point voltage for the H1 rising side of the horizontal transfer clocks H1 and H2 waveforms is VCR. The overlap period for twh and twl of horizontal transfer clocks H1 and H2 is two. (4) Reset gate clock waveform RG tr twh tf VRGH RG waveform twl VRG Point A VRGLH VRGLL VRGLm VRGL VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval twh, then: VRG = VRGH - VRGL Negative overshoot level during the falling edge of RG is VRGLm. (5) Substrate clock waveform SUB 100% 90% M VSUB 10% VSUB 0% (A bias generated within the CCD) M 2 tf tr twh -8- ICX415AQ Clock Switching Characteristics (Horizontal drive frequency: 29.5MHz) twh Item Readout clock Vertical transfer clock Horizontal transfer clock Symbol VT V1, V2, V3 H1 H2 9.5 12.0 9.5 12.0 4 7 9.5 12.0 9.5 12.0 22 5.0 7.5 5.0 7.5 2 0.5 twl tr tf Unit s 250 5.0 7.5 5.0 7.5 3 0.5 ns ns ns s When draining charge Remarks During readout When using CXD3400N tf tr - 2ns Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 2.3 2.5 0.5 15 0.5 Reset gate clock RG Substrate clock SUB 0.7 0.8 Item Horizontal transfer clock Symbol H1, H2 two Min. Typ. Max. 7.5 9.5 Unit ns Remarks 1 Clock Switching Characteristics (Horizontal drive frequency: 14.75MHz) twh Item Readout clock Vertical transfer clock Horizontal transfer clock Symbol VT V1, V2, V3 H1 H2 18 21 11 23 26 14 21 18 26 23 49 10 17.5 10 2 0.5 15 twl tr tf Unit s 350 10 17.5 10 2 0.4 15 ns ns ns s When draining charge Remarks During readout When using CXD3400N tf tr - 2ns Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 4.6 5.0 0.5 15 0.5 Reset gate clock RG Substrate clock SUB 1.4 1.6 Item Horizontal transfer clock Symbol H1, H2 two Min. Typ. Max. 20 24 Unit ns Remarks 1 1 The overlap period of twh and twl of horizontal transfer clocks H1 and H2 is two. -9- ICX415AQ Image Sensor Characteristics Item G Sensitivity Sensitivity comparison Saturation signal Smear Uniformity between video signal channels Dark signal Dark signal shading Lag Symbol Min. Sg Rr Rb Vsat Sm Srg Sbg Vdt Vdt Lag 570 0.4 0.3 375 -100 -92 25 8 8 2 1 0.5 Typ. Max. Unit 720 0.55 0.45 940 0.7 0.6 mV dB % % % mV mV % mV Measurement method 1 1 1 2 3 4 5 5 6 7 8 Ta = 60C Ta = 60C Zone 0 Ta = 60C Remarks (Ta = 25C) 1/25s accumulation conversion value Video signal shading SHg Note) All image sensor characteristic data noted above is for operation in 1/50s progressive scan mode. Zone Definition of Video Signal Shading 782 (H) 6 6 2 582 (V) 2 Zone 0 Ignored region Effective pixel region Measurement System CCD signal output [A] Gr/Gb CCD C.D.S AMP S/H R/B S/H R/B channel signal output [C] Gr/Gb channel signal output [B] Note) Adjust the amplifier gain so that the gain between [A] and [B], and between [A] and [C] equals 1. - 10 - ICX415AQ Image Sensor Characteristics Measurement Method Measurement conditions (1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions. (2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb channel signal output or the R/B channel signal output of the measurement system. (2) In the following measurements, this image sensor is operated in 1/50s all pixels progressive scan mode. Color coding of this image sensor & Readout Gb R Gb R B Gr B Gr Gb R Gb R B Gr B Gr The primary color filters of this image sensor are arranged in the layout shown in the figure on the left (Bayer arrangement). Gr and Gb denote the G signals on the same line as the R signal and the B signal, respectively. Horizontal register Color Coding Diagram All pixels' signals are output successively in a 1/50s period. R signal and Gr signal lines and Gb signal and B signal lines are output sequentially. - 11 - ICX415AQ Image sensor readout mode The diagram below shows the output methods for the following two readout modes. (1) Progressive scan mode R G R G R VOUT G B G B G 1. Progressive scan mode In this mode, all pixel signals are output in non-interlace format in 1/50s. All pixel signals within the same exposure period are read out simultaneously, making this mode suitable for high resolution image capturing. (2) Center scan mode Undesired portions (Swept by vertical register high-speed transfer) Picture center cut-out portion 2. Center scan mode This is the center scan mode using the progressive scan method. The undesired portions are swept by vertical register high-speed transfer, and the picture center portion is cut out. There are the mode (100 frames/s) which outputs 264 lines of an output line portion, and the mode (200 frames/s) which outputs 88 lines. - 12 - ICX415AQ Definition of standard imaging conditions (1) Standard imaging condition I: Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. (2) Standard imaging condition II: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. G Sensitivity, sensitivity comparison Set to the standard imaging condition I. After setting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (VGR, VGb, VR and VB) at the center of each Gr, Gb, R and B channel screen, and substitute the values into the following formulas. VG = (VGr + VGb)/2 Sg = VG x 100 [mV] 25 Rr = VR/VG Rb = VB/VG 2. Saturation signal Set to the standard imaging condition II. After adjusting the luminous intensity to 20 times the intensity with the average value of the Gr signal output, 120mV, measure the minimum values of the Gr, Gb, R and B signal outputs. 3. Smear Set to the standard imaging condition III. With the lens diaphragm at F5.6 to F8, first adjust the average value of the Gr signal output to 120mV. Measure the average values of the Gr signal output, Gb signal output, R signal output and B signal output (Gra, Gba, Ra, Ba), and then adjust the luminous intensity to 500 times the intensity with the average value of the Gr signal output, 120mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (Vsm [mV]) independent of the Gr, Gb, R and B signal outputs, and substitute the values into the following formula. Sm = 20 x log Vsm / ( Gra + Gba + Ra + Ba 1 1 x 500 x 4 10 ) [dB] (1/10V method conversion value) - 13 - ICX415AQ 4. Video signal shading Set to the standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjusting the luminous intensity so that the average value of the Gr signal output is 120mV. Then measure the maximum value (Grmax [mV]) and minimum value (Grmin [mV]) of the Gr signal output and substitute the values into the following formula. SHg = (Grmax - Grmin)/120 x 100 [%] 5. Unifoemity between video signal channels After measuring 4, measure the maximum (Rmax [mV]) and minimum (Rmin [mV]) values of R signal, and the maximum (Bmax [mV]) and minimum (Bmin [mV]) values of B signal. Substitute the values into the following formula. Srg = (Rmax - Rmin )/120 x 100 [%] Sbg = (Bmax - Bmin )/120 x 100 [%] 6. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature of 60C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 7. Dark signal shading After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. Vdt = Vdmax - Vdmin [mV] 8. Lag Adjust the Gr signal output value generated by the strobe light to 120mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal amount (Vlag). Substitute the value into the following formula. Lag = (Vlag/120) x 100 [%] VD V2 Light Strobe light timing Gr signal output 120mV Output Vlag(lag) - 14 - Drive Circuit 15V 100k 0.1 -7.5V 1/35V 20 19 18 17 1 NC NC NC NC V3 V2 V1 GND VOUT CGG 0.1 3.3V 1/10V 1 XSUB 2 XV3 2 3 4 5 6 7 8 9 10 11 NC 3 2SC4250 0.1 0.1 ICX415 (BOTTOM VIEW) 3.3/20V H1 SUB VL RG VDD 4 16 15 14 13 12 NC NC NC SUBCIR CSUB H2 XSG3 5 CCD OUT 4.7k XV2 6 CXD3400N - 15 - 11 0.1 2200p 0.1 7 XSG2 8 9 XV1 10 0.01 22 21 20 19 18 17 16 15 14 13 12 H2 3.3/16V 1M H1 RG ICX415AQ ICX415AQ Spectral Sensitivity Characteristics (Excludes lens characteristics and light source characteristics) 1.0 G R 0.8 B Relative Response 0.6 0.4 0.2 0 400 450 500 550 Wave Length [nm] 600 650 700 - 16 - Drive Timing Chart (Vertical Sync) Progressive Scan Mode VD "a" 7 596 598 625 1 7 1 2 3 4 5 6 7 8 HD 598 V1 V2 V3 625 1 1 2 3 4 5 6 7 8 1 2 3 OUT 582 1 2 582 1 2 - 17 - ICX415AQ Drive Timing Chart (Vertical Sync "a" Enlarged) Progressive Scan Mode/Center Scand Mode "a" Enlarged H1 V1 627 701 V2 V3 - 18 - 74 74 16 16 16 16 16 16 16 16 16 16 16 16 ICX415AQ Drive Timing Chart (Horizontal Sync) Progressive Scan Mode CLK 42 163 1 19 1 166 96 138 H2 SHP SHD - 19 - 1 1 16 1 48 1 1 32 1 1 57 1 V1 48 1 48 V2 32 V3 48 1 16 SUB 23 1 16 1 RG 102 144 H1 1 4 944 1 6 ICX415AQ Drive Timing Chart (Vertical Sync) Center Scan Mode 1 VD "d" 23 24 27 290 291 "a" "b" "c" "d" "a" "b" HD 310 311 312 1 2 3 4 5 6 7 8 1 422 423 290 291 V1 V2 V3 422 423 160 161 OUT 1 310 311 312 1 2 3 4 5 6 7 8 - 20 - ICX415AQ Drive Timing Chart (Horizontal Sync) Center Scan Mode 1 (Frame Shift) ("b") 16048 bits = 17H 42 H1 H2 - 21 - V1 V2 V3 16 16 16 16 16 16 144 16 16 16 16 16 16 #1 #166 ICX415AQ Drive Timing Chart (Horizontal Sync) Center Scan Mode 1 (High-speed Sweep) ("d") 18880 bits = 20H 42 H1 H2 - 22 - V1 V2 V3 16 16 16 16 16 16 144 16 16 16 16 16 16 #1 #194 ICX415AQ Drive Timing Chart (Vertical Sync) Center Scan Mode 2 VD "d" 32 33 36 123 124 "a" "b" "c" "d" "a" "b" HD 154 155 156 1 2 3 4 5 6 7 8 1 334 335 123 124 V1 V2 V3 334 335 248 249 OUT 1 154 155 156 1 2 3 4 5 6 7 8 - 23 - ICX415AQ Drive Timing Chart (Horizontal Sync) Center Scan Mode 2 (Frame Shift) ("b") 24544 bits = 26H 42 H1 H2 - 24 - V1 V2 V3 16 16 16 16 16 16 144 16 16 16 16 16 16 #1 #254 ICX415AQ Drive Timing Chart (Horizontal Sync) Center Scan Mode 2 (High-speed Sweep) ("d") 29264 bits = 31H 42 H1 H2 - 25 - V1 V2 V3 16 16 16 16 16 16 144 16 16 16 16 16 16 #1 #299 ICX415AQ ICX415AQ Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W soldering iron with a ground wire and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.) Upper ceramic 39N 29N 29N 0.9Nm Lower ceramic Low melting point glass Shearing strength Tensile strength Torsional stregth Compressive strength b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portions. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. - 26 - ICX415AQ c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to other locations as a precaution. d) The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. e) If the leads are bent repeatedly and metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored. When high luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the image-plane may become excessive and discoloring of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the poweroff mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) Brown stains may be seen on the bottom or side of the package. But this does not affect the CCD characteristics. - 27 - Package Outline Unit: mm 22 pin DIP (600mil) 0 to 9 9.0 22 12 12 22 A 0.7 ~ 3 C 15.24 15.1 0.3 B 11.55 7.55 V H 1 B' 14.6 0.7 3.26 0.3 3 0.25 2-R0.7 ~ 3 0.55 18.0 0.4 17.6 11 1 4.0 0.3 0.69 (For the 1st.pin only) 1.27 0.3 M 0.3 0.46 1.27 - 28 - Cer-DIP TIN PLATING 42 ALLOY 2.60g AS-B15-03(E) 1. "A" is the center of the effective image area. 2. The two points "B"of the package are the horizontal reference. The point "B"of the package is the vertical reference. 3 The bottom "C"of the package is the height reference. 4 The center of the effective image area,relative to "B"and "B'"is HV 9.0 7.55 0.15mm 5 The rotation angle of the effective image area relative to H and V is 1 6 The height from bottom "C" to the effective image area is 1.41 0.15mm 7 The tilt of the effective image area relative to the bottom "C" is less than 60m 8 The thickness of the cover glass is 0.75mm,and the refractive index is 1.5. 9 The notches on the bottom must not be used for reference of fixing. PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS ICX415AQ Sony Corporation DRAWING NUMBER |
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